In recent years, integrated circuits of which the degree of integration has been increased by three-dimensionally layering chips on top of each other have been demanded. When memory chips are layered on top of each other, the memory capacity can be increased, and thus, the power consumption required for data transfer can be reduced. As a technology for connecting signals or power supply lines between the thus-layered chips, connection by means of wire bonding, connection by means of TAB (tape automated bonding) and connection through TSV (through silicon via) have been known.
From among the above, wire bonding has such a problem that the mounting volume increases because the chips must be layered on top of each other in such a manner that the chips are shifted from each other so as not to cover the openings for wire bonding pads for power supply. In addition, the current capacity per bonding wire is small and there is an upper limit in the number of bonding wires, and therefore, there is a problem that a sufficient power supply quality cannot be gained.
TAB provides a current capacity that is greater as compared to wire bonding, and pads for power supply can be provided in other areas than the inner periphery of the chips. However, a relatively large gap through which the tape for TAB passes through between the layered chips is required, and there is a problem such that the pitch between the chips in the direction in which the chips are layered is large.
In contrast, TSV is characterized in that all these problems can be solved. Furthermore, TSV can be used in the case where not only individual chips, but also wafers are layered on top of each other for connection, and therefore has such an advantage that the efficiency in the manufacture (throughput) is high. However, additional processes for creating holes in a silicon body, forming an insulating film on the inner wall surface of the holes, filling the holes in with an electrode, and connecting the electrodes to bumps, and therefore, there is a problem that the manufacturing costs are high.
Meanwhile, the present inventor has proposed an electronic circuit where wireless data communication is carried out between the layered chips using inductive coupling between coils formed of wires in the semiconductor integrated circuit chips, and thus has solved the above-described problems concerning data connection (see Patent Literature 1 and Patent Literature 2).
For example, the invention in Patent Literature 1 can be applied to wireless data communication using inductive coupling in a coil pair between the layered chips. In addition, the invention in Patent Literature 2 can be applied to wireless data communication between chips having the same size that are mounted so as to be layered on top of each other as well as power supply using wire bonding.